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 HA16138PS
AC/DC Switching Converter Controller IC With High-Voltage Power MOS FET
ADE-204-032 (Z) Preliminary 1st Edition MAY 2000 Description
The HA16138PS is an IC with a high-voltage power MOS FET and current-mode type PWM controller mounted in a DILP-8 (DP-8) standard package, suitable for low-power power supplies in the 10 W class and below. The HA16138PS includes an energy-saving mode for holding down power consumption when on standby (no load). When the energy-saving mode is entered, the operating frequency is reduced to 1/4 the normal frequency, reducing power consumption. A starter circuit is also provided on-chip, eliminating the need for the external start-up resistance needed with previous controller ICs. The starter circuit in this IC is turned off automatically after the IC starts up, enabling the start-up resistance power consumption to be decreased. The HA16138PS includes a soft start circuit, OVP circuit, and remote on/off circuit, making it possible to configure a simple protection circuit with fewer external parts than previously. Also provided are a current sense resistance and a leading edge blanking circuit that masks spike noise on current sense input, making noise reduction in a power supply set comparatively easy. The HA16138PS is equipped with an error amp circuit inverting input (FB) pin and output (COMP) pin, enabling special-purpose design for both flyback system secondary-side output voltage detection and primary-side back-up transformer output voltage detection types.
Features
* Built-in high-voltage power MOS FET * Energy-saving mode (power saving through reduction of operating frequency to 1/4 normal frequency when on standby) * Built-in starter circuit, reducing power loss of start-up resistance when on standby (external start-up resistance not necessary) * Built-in soft start circuit, eliminating need for external connection * Remote on/off function, enabling power saving by halting PWM output without turning off power supply * Built-in current sense resistance and leading edge blanking circuit, for sense-resistance-less and noisecancellation-filter-less implementation * Built-in over voltage protection circuit * Built-in over temperature protection circuit
HA16138PS
Pin Arrangement
DRAIN 1 DRAIN 2 VDD 3 FB 4 (Top view)
8 SOURCE 7 SGND 6 CT 5 COMP
DILP-8 (DP-8)
Pin Functions
Pin No. 1 2 3 4 5 6 7 8 Pin Name DRAIN DRAIN VDD FB COMP CT SGND SOURCE Pin Function On-chip power MOS FET drain pin / starter circuit input pin On-chip power MOS FET drain pin / starter circuit input pin Power supply voltage input pin Error amplifier inverting input pin / OVP latch circuit input pin Error amplifier output pin Timing capacitance connection pin / on/off circuit input pin Primary-side common connection pin On-chip power MOS FET source pin
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HA16138PS
Block Diagram
VDD
VDD CT
+ - ON/OFF Comp.
Starter Vref Generator
UVL
DRAIN
UVL
Oscillator
1/4 Divider CK
+ -
Driver FF
DQ
CS Comp. + -
Vref FB
- +
Frequency Down Comp.
SOURCE Rcs
E-AMP VDD RQ
1/3 Attenuator
Vref
+ -
Delay Leading Edge Blanking
+ -
S TSD UVL
OVP Latch
Soft Start
COMP
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HA16138PS
Absolute Maximum Ratings (Ta = 25C)
Item Power MOS FET block Drain-source voltage Maximum drain current Controller block Power supply voltage CT pin voltage FB pin voltage COMP pin voltage Overall Operating temperature Junction temperature Storage temperature Symbol VDS I DS VDD VCT VFB VCOMP Topr Tjmax Tstg Rating -0.3 to 700 0.5 0 to 15 0 to V DD 0 to V DD 0 to 5 -20 to +85 +150 -55 to +150 Unit V A V V V V C C C
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HA16138PS
Electrical Characteristics (Tj = 25C, VDD = 12 V, fosc1 = 100 kHz)
Item Power MOS FET Starter circuit UVL circuit Drain-source voltage Drain-source on resistance Start-up start drain voltage Start-up charge current Operation start power supply voltage Operation stop power supply voltage Operating power supply current Oscillation circuit Normal mode operating frequency F-down mode operating frequency Maximum on duty Error amplifier Open-loop voltage gain Unity gain bandwidth Output high voltage 1 Output high voltage 2 Output low voltage Non-inverting input voltage Power MOS FET gate drive circuit Current sense circuit OVP latch circuit Output rise time Output fall time Output high voltage Output low voltage Current sense voltage gain Current sense response time Leading edge blanking time OVP latch set voltage OVP latch reset voltage OVP latch current dissipation Remote on/off circuit Soft start circuit f-down comparator Over temperature protection circuit Off mode start voltage Soft start time F-down mode start voltage Over temperature protection start temperature Symbol BV DSS RDS(on) VDRN ICHG VTH VTL IDD fosc1 fosc2 Dumax AV BW VCOMPH1 VCOMPH2 VCOMPL V(+)EA tr tf VOH VOL AVCS tpdcs tBL Vovp Vovpr Iovp Voff tst Vfdcp TSD Min 700 55 125 10 7 88 22 50 4.5 4.3 3.4 4.2 3.6 (1.0) 0.7 Typ 12 75 250 11 8 2.5 100 25 70 65 550 5.0 4.8 0.50 3.8 100 80 10 0.5 3.0 200 300 5.0 4.0 1.1 3.8 2.0 0.85 150 Max 20 95 500 12 9 4.0 112 28 0.75 4.2 5.8 1.7 4.0 (3.0) 1.0 Unit V V A V V mA kHz kHz % dB kHz V V V V ns ns V V V/V ns ns V V mA V ms V C TSD: Power MOS FET junction temperature Vovp: FB pin voltage Vovpr: VDD pin voltage VFB = 6.0 V Voff: CT pin voltage Time from start-up to max. duty Vcomp = 5.0 V CL = 1000 pF CL = 1000 pF Iosource = 25 mA Iosink = 25 mA Rcomp = 220 k Rcomp = 220 k Iosource = 0 A Iosource = 100 A Iosink = 0 A CT = 220 pF CT = 220 pF, VCOMP = 0 V ID = 0.4 A Test Conditions
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HA16138PS
Functional Description
Note: Unless specified otherwise, characteristic values in the text and figures are typical values or design values. Starter Circuit When power is turned on, the starter circuit operates during standby mode, and a constant current is supplied from the drain pins to the VDD pin. This constant current supplies the external capacitance charge current for charging up the VDD pin and the standby current consumed by the IC itself while on standby. Therefore, the start-up bleeder resistance required by previous products with no on-chip starter circuit is no longer necessary. The starter circuit detects both the drain voltage and the VDD pin voltage, and controls VDD so that the IC does not start up if the drain voltage is less than 75 V.
Vb+
0 75V 0
DRAIN
Istart
0 11V 8V 0
VDD
CT COMP
0
0
DC OUTPUT 0
Figure 1 Start-Up Timing UVL Circuit The UVL circuit is a function that monitors the VDD voltage, and stops IC operation if VDD is low. The VDD detection voltage has a hysteresis characteristic; the operating start VDD voltage is 11 V, and the operation stop voltage, 8 V. In standby mode at the operation stop voltage or below, the UVL circuit keeps the power MOS FET turned off, and performs control of soft start circuit resetting, internal reference voltage circuit stoppage, and so forth.
6
HA16138PS
Error Amplifier The error amplifier comprises a constant-current source type Pch top differential amplifier. As the inverting input (FB) pin and output (COMP) pin are provided as external pins, use for both a simple flyback power supply back-up voltage feedback type and a high-precision secondary voltage detection type is possible. Current Sense Circuit This is a 200 ns high-speed comparator circuit suitable for current mode control. The current sense controller reference voltage depends on the COMP pin voltage, being always 1/3 of the COMP pin voltage.
Power MOS FET
Driver Osc. FF + - Current sense comparator - + Error amplifier 2R R 1/3 attenuator 300 ns Delay circuit Leading edge blanking
Current sense resistance
Figure 2 Current Sense Peripheral Circuitry Leading Edge Blanking Circuit The on-chip leading edge blanking circuit masks the current sense comparator input signal for a period of 300 ns after the power MOS FET gate voltage goes high. This reduces the erroneous operation due to spike-shaped noise caused by discharge of various capacitance components when the power MOS FET is turned on.
7
HA16138PS
Oscillation Circuit The oscillator generates a triangular voltage waveform through the discharge of the timing capacitance CT. With a 220 pF CT connected, the oscillator operates at 100 kHz. The triangular voltage waveform has a discharge time ratio of 3:1, with the charge side set to PWM onpulses, and the discharge side to dead-band pulses. The maximum PWM on duty can be controlled up to 70%.
CT DB pulse (IC internal waveform) 1/3COMP (IC internal waveform) CS (IC internal waveform) Power MOS FET Gate voltage (IC internal waveform) Power MOS FET Drain voltage
Figure 3 Oscillation Circuit Peripheral Waveform Timing OVP Latch Circuit When the FB pin voltage reaches 5 V or above, the OVP latch circuit operates and forcibly stops PWM output and the reference voltage generation circuit. While OVP latching is stopped, the starter circuit is also stopped. Latch resetting can be performed by driving power supply voltage VDD to 4 V or below.
DRAIN
0
CT
0
FB
0
5V
Vref (IC internal waveform)
5V 0
Figure 4 OVP Latch Operation Timing
8
HA16138PS
Remote On/Off Circuit When the CT pin voltage is pulled up to 3.8 V or above, the remote on/off circuit operates and PWM output can be stopped without turning off the power supply. When stoppage is executed by means of the on/off circuit, PWM output and the starter circuit are stopped, and the soft start circuit is reset, but the reference voltage generation circuit does not stop.
DRAIN
0
CT
3.8V
Vref (IC internal 5V waveform)
Figure 5 Remote On/Off Operation Timing Soft Start Circuit This circuit implements a soft start function with a 2 ms time constant without the use of external parts. During a soft start, the PWM output pulse width gradually increases. The soft start time is defined as the time from the point at which the UVL circuit start voltage is exceeded to the point at which PWM output reaches its maximum duty.
9
HA16138PS
f-down Comparator An "energy-saving mode" is provided to hold down power consumption during standby, with the operating frequency in the unloaded state reduced to 1/4 of its steady operation value. The f-down comparator detects the COMP pin voltage, and if it falls to 0.85 V or below, switches to energy-saving mode. As COMP pin voltage detection is performed pulse-by-pulse, a skip mode comes into effect in the vicinity of the threshold voltage according to the timing.
VCT
VCOMP
VDRAIN
Normal mode Energysaving mode Normal Energymode saving mode
Figure 6 Energy-Saving Mode Switching Waveform Timing Over Temperature Protection Circuit If the power MOS FET junction temperature reaches +150C, the over temperature protection circuit operates, shutting down the IC. The over temperature protection circuit is coupled to the OVP latch circuit, so that the latch is reset if the power supply voltage is driven to 4 V or below while the junction temperature is lower than the overheating protection start temperature.
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HA16138PS
Main Characteristics
Operating Frequency vs. Timing Capacitance
1000
300
normal mode operating frequency
fosc (kHz)
100
30
f-down mode operating frequency
10 100
200
300 400 500 CT (pF)
1000
Start-up Current (Charge Current + Standby Current) vs. Drain Voltage 500 450 400 350 Idrain (A) 300 250 200 150 100 50 0 0 10 20 30 40 50 Vdrain (V) 60 70 80
12 10 8 6 4 2 0 0
Power Supply Voltage vs. Drain Voltage
VDD (V)
10
20
30
40 50 Vdrain (V)
60
70
80
11
HA16138PS
Error Amplifier Output High Voltage vs. Output Source Current 6.0 5.0 4.0 VOH (V) 3.0 2.0 1.0 0 0 100 200 300 400 500 Iosource (A) 600 700 800
Error Amplifier Output Low Voltage vs. Output Sink Current 2.5 2.0 VOL (V) 1.5 1.0 0.5 0 0 200 400 600 Iosink (A) 800 1000
12
HA16138PS
Operating Frequency (Normal Mode) vs. Ambient Temperature 110 108 106 104 fosc (kHz) 102 100 98 96 94 92 90 -25 0 25 Ta (C) 50 75 100
Operating Start/Stop Power Supply Voltage vs. Ambient Temperature 13 12 VTH, VTL (V) 11 10 9 8 7 6 -25 0 25 Ta (C) 50 75 100 VTL VTH
13
HA16138PS
Thermal Resistance j-a and Maximum Power Dissipation vs. Printed Circuit Board Copper Heat Sink Perimeter Length 120 2.5 100 j-a (C/W) 80 60 40 20 0 10 20 30 Length of copper, L (mm) 40 2.0 1.5 1.0 0.5 0 50 Maximum power dissipation (W)
Pt(max) for Ta = +85C
j-a
2.0 oz copper heat sink
Pin holes
Glass-epoxy printed circuit board
L
Wiring pattern
Figure 7 Sample Printed Circuit Board Copper Heat Sink Pattern
14
L
HA16138PS
Application Circuit Examples 1
The application circuit example shown here detects the secondary-side output voltage of a flyback power supply. Secondary-side output voltage detection and feedback are performed by a shunt regulator and photocoupler. When the OVP latch function is used for secondary-side output voltage overvoltage protection, the FB pin should be pulled up to VDD by the shunt regulator and photocoupler.
Transformer P: 90T / 1.43mH S: 6T / 8.1H B: 14T / 30.8H 2200p 100 400V + Line Filter VR 260V B 51k P S SBD HRW26F
AC INPUT 0.1
OVP detection circuit (7.4V) 15 + + + R3 330 R4 1.8k C4 0.022 R5 3.3k
HA17431VP
R8 330 R6 4.7k R9 1.8k C5 3.3 R10 3.3k
HA17431VP
560 180 25V 25V
R11 2.4k DC OUTPUT 5V/2A
: Primary GND : Secondary GND
K
K
A REF
A REF R7 2.4k
R12 2.4k
-
HA16138PS
1 DRAIN SOURCE 8 2 DRAIN
OVP feedback circuit
SGND 7 CT 6 COMP 5
3 VDD 4 FB + C1 47 20V
R1 VR 120k 15V
C3 R2 C2 15k 2200p 220p
* The secondary-side output voltage is stabilized at a value determined by the bleeder resistance of the secondary-side shunt regulator. VOUT(reg) = Vref(shunt) x R11 + R12 R12 = 2.5V x 2.4k + 2.4k 2.4k
= 5.0V
Units R: C: F When the OVP latch function is used, the secondary-side voltage is detected by the shunt regulator, and feedback to the FB pin is performed by the photocoupler. The OVP detection level is determined by the following formula. VOUT(ovp) = Vref(shunt) x R6 + R7 R7 = 2.5V x 4.7k + 2.4k 2.4k = 7.4V
Photo coupler
15
HA16138PS
Application Circuit Examples 2
The application circuit example shown here detects the primary-side back-up output voltage of a flyback power supply. As the back-up output voltage, VDD is resistance-divided and feedback is performed to the FB pin. The back-up output voltage and secondary-side output voltage are proportional to the ratio of transformer windings. Using this characteristic enables the system to be configured with simple circuitry as shown in the figure below. The VDD-to-FB feedback resistance can also be used as the back-up output voltage OVP detection resistance.
Transformer P: 90T / 1.43mH S: 6T / 8.1H B: 14T / 30.8H 2200p 100 400V + Line Filter : Primary GND : Secondary GND VR 260V B 51k P S SBD HRW26F + 560 25V 180 25V 15 + + DC OUTPUT 5V/1A -
AC INPUT 0.1
HA16138PS
1 DRAIN SOURCE 8
R1 240k
2 DRAIN 3 VDD 4 FB
+ C1 47 20V
SGND 7 CT 6 COMP 5
C2 0.1 R3 1M R4 15k C3 C4 2200p 220p
R2 VR 120k 15V
* If feedback resistance R1 = 240 k and R2 = 120 k, feedback is performed so that the FB pin voltage is non-inverting input voltage V(+)EA, and the VDD voltage is stabilized. VDD(reg) = V(+)EA x R1 + R2 R2 240k + 120k = 3.8V x 120k = 11.4V
Units R: C: F When the FB pin voltage reaches OVP latch set voltage Vovp, the OVP latch circuit operates, shutting down the IC. The VDD voltage in this case is given by the following formula. VDD(ovp) = Vovp x R1 + R2 R2 240k + 120k = 5.0V x 120k = 15V
16
HA16138PS
Application Circuit Examples 3
As this IC is provided with a remote on/off function, it is possible to implement power management without turning off the power supply. Using a remote on/off control circuit as shown in the figure below, the CT pin voltage is pulled up to the off mode start voltage or above, and the IC is stopped. In the off mode, control of PWM output stoppage, soft start resistance resetting, and starter circuit stoppage is performed without stopping the internal reference voltage generation circuit. With this function, also, latch operation is not performed, and an auto-restart is executed as soon as the CT pin voltage falls below the off mode start voltage. It is recommended that the remote on/off control signal be controlled by a microcomputer or other logic signal.
Remote ON/OFF control circuit
R2 43k HA16138PS 2SA1029 R1 10k R3 130k
1 DRAIN SOURCE 8 2 DRAIN 3 VDD 4 FB SGND 7 CT 6 COMP 5
CT 220p
R4 10k 2SC458
ON/OFF
H: OFF L: ON
Units R: C: F
17
HA16138PS
Laser Marking Specifications
Product code
HA16138 PS 123
Lot indication and Management code
Lot Indication and Management Code Contents 1 : The last digit of the production year. 2 : Production month code 3 : Management code
Production month Month code 1 A 2 B 3 C 4 D 5 E 6 F 7 G 8 H 9 J 10 K 11 L 12 M
18
HA16138PS
Package Dimensions
Unit: mm
9.6 10.6 Max 8 5 6.3 7.4 Max 1 0.89 4 1.3 2.54 Min 5.06 Max
1.27 Max
7.62
0.1 Min
0.25 - 0.05 0 - 15
Hitachi Code JEDEC EIAJ Weight (reference value)
+ 0.10
2.54 0.25
0.48 0.10
DP-8 Conforms Conforms 0.54 g
19
HA16138PS
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to:
Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX
Copyright ' Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.
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